Updated on January 03, 2017.
Name : Y.N. SRIKANT
Designation : Professor
Department : Computer Science and Automation
email : email@example.com
Phone : +91-80-2293 2771
Fax : +91-80-2360 2911
Official Address : Dept. of Computer Science and Automation
Indian Institute of Science
Bangalore 560 012, India
Residential Address : NE-314, New E-Type Quarters
Indian Institute of Science Campus
Bangalore 560 012, India
Phone: +91-80-2360 3452
B.E. (Electronics) Bangalore University, 1978.
M.E. (Automation) Indian Institute of Science (CSA), 1980.
Ph.D. (Computer Science) Indian Institute of Science (CSA), 1986.
Member, Association for Computing Machinery (ACM)
PC member, RTSS 2012
Member, Editorial Advisory Board, SOFTWARE: Practice and Experience, Wiley
Associate Editor, Sadhana, Indian Academy of Sciences
Member, Editorial Council, Resonance, Indian Academy of Sciences
PC Member, EMSOFT 2014
PC Chair, IISc Centenary Conference, MCDES 2008
PC Member, EMSOFT 2007, 2008, 2010
PC Member, VLSI Design 2007
PC Member, PACT 2003
Technical Program Chair, IEEE TENCON 2003
Member of Computer Society of India
Positions held at the Indian Institute of Science
13-Oct-1980 12-Oct-1985 Systems Programmer
13-Oct-1985 2-Jul-1987 Senior Scientific Officer
3-Jul-1987 2-Jul-1993 Assistant Professor
3-Jul-1993 2-Jul-1999 Associate Professor
3-Jul-1999 Present Professor
3-Jul-1999 10-Nov-2000 Associate Chairman
11-Nov-2000 3-Nov-2005 Chairman
Link to Compilers, Programing Languages and Software Engineering Research Group
Timing analysis of programs using static analysis,
compilation for multi-core architectures, profiling, speculative execution,
parallel programming languages, static analysis for security, and compiling for clouds.
Some Ongoing Research Projects
Static analysis of multi-level caches and worst case execution time estimation
Static analysis and security of Android apps
A new programming language for graph manipulations and its implementation on GPUs
Compiling StreamIT on GPUs
Teaching Interests at graduate level:
Compiler Design (see Compiler Design Course Description)
Two NPTEL sponsored video courses on compiler design are available at:
Compiler Design (advanced course) and
Principles of Compiler Design (first level course)
(Available on youtube also)
Robotics and applications (DRDO, 1985-90, Co-Principal Investigator).
A Parallelizer for Fortran programs for the BARC parallel processing system (DAE, 1995-99, Principal Investigator).
A Retargetable Compiler Tool Kit for DSP architectures (Motorola India Electronics Ltd., 1997-98, Principal Investigator).
Investigations with .NET (Microsoft Research, July 2001-03, Principal Investigator).
Profile-Guided Optimizations with ROTOR (Microsoft Research, 2002-04, Principal Investigator).
Memory System Behaviour of .NET Applications and A Profile-Guided Garbage Collector for Rotor (Microsoft Research, 2004-05, Principal Investigator).
Collaboration with University of Saarland (Saarbruecken, Germany) on Predictability of Resource Consumption in Embedded Systems (DST/DAAD, 2005-08, Principal Investigator).
A framework for power-aware programming (Satyam Computers, 2005-06, Principal Investigator).
Program partitioning for massively multi-player games (Satyam Computers, 2006-07, Principal Investigator).
A parallel Java virtual machine for multi-core architectures (Satyam Computers, 2007-08, Principal Investigator).
Exploiting energy-saving features of sensor network nodes by smart compilation (DRDO, 2006-2010, Investigator, part of Wireless Sensor Networks Project).
Multi-Core Cloud Computing Platforms: Programming, Compiling, Scheduling and Resource Allocation Issues (Infosys Technologies, 2009-present, Principal Investigator).
Program Analysis and Applications, IMPECS Project (DST/MPI, 2011-2016, Principal Investigator)
Research Thesis Guidance - Ph.D
N. Viswanathan, Algorithms for Parallel Compilation, Ph.D, Jan. 1992 (currently at Zilog Corporation, USA).
R.K. Kulkarni, Towards Complete Automatic Code Generation, Ph.D, Sept.1995 (successful entrepreneuer, whose company, Synergy Infotech, was acquired by Sonim Technologies; currently pursuing another company, Parallelocity).
U. Nagaraj Shenoy, Automatic Data Partitioning Using Hirearchical Genetic Search, Ph.D, Sept. 1996 (formerly Associate Professor, North-Western University) .
R. Venugopal, Incremental Techniques for Code Generation Problems, Ph.D, June 1997 (currently at Synopsis).
M.A. Dave, AMI - The Language and its Implementation, Ph.D, April 1997.
S.R.Prakash, Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines, Ph.D, July 1998 (currently at AMD, Bangalore).
Vineet Kumar Paleri, An Environment for Automatic Generation of Code Optimizers, Ph.D, July 1999 (jointly with Prof. Priti Shankar, currently Professor in CSE dept., NIT Calicut)
M. Bharat Kumar, Mining for Nurturers in Collaborative Networks, Ph.D, May 2007 (currently an entrepreneuer)
Sujit Kumar Chakrabarti, Using Explicit State Space Enumeration for Specification based Regression Testing , Ph.D, July 2008 (currently assistant Professor, IIIT, Bangalore)
Kapil Vaswani, Efficient Online Path Profiling, Ph.D, February 2008 (jointly with Prof. Matthew Jacob)(currently at Microsoft Research India). kapil-PhD-thesis.pdf
Rahul Nagpal, Compiler-Based Energy Optimizations for Clustered VLIW Processors, Ph.D, July 2008 (currently at AMD, Bangalore).Rahul_PhD_Thesis.pdf
Subhajit Roy, Algorithms for Profiling and Representing Programs with Applications to Speculative Optimizations, Ph.D, June 2010 (currently assistant professor, IIT Kanpur). Subhajit_PhD_Thesis.pdf
R. Arun, Energy-saving compiler optimizations for multi-core architectures, Ph.D, June 2011 (currently at AMD, Bangalore). arun-PhD-thesis.pdf
Aparna Mandke, Fast Performance Analyzer for Chip Multicore Architectures, Ph.D, June 2012. (jointly with Dr. Bharadwaj Amrutur, currently at AMD, Bangalore). aparna-PhD-thesis.pdf
Archana Ravindar, Investigations on CPI-Centric Worst Case Execution Time Analysis, Ph.D, June 2013 (currently at IBM, Bangalore). archana-PhD-thesis.pdf
Ananda Vardhan K, Designing Energy-Aware Optimization Techniques through Program Behavior Analysis, Ph.D, August 2014 (currently at INTEL, Bangalore). anand-PhD-thesis.pdf
Kartik Nagar, Precise analysis of Private and Shared Caches for tight WCET Estimates, Ph.D, June 2015 (currently at Purdue University, USA). kartik-PhD-thesis.pdf
Rajesh Kumar Thakur, Compilers for Stream Programming Languages, Ph.D (ongoing).
C. Unnikrishnan, Design and Implementation of FALCON: A Graph Manipulation Language, Ph.D (ongoing).
Ashish Mishra, Static analysis of security aspects of programs, Ph.D (jointly with Dr. Aditya Kanade, ongoing).
Research Thesis Guidance – M.Sc(Engg.)
M. Chelliah, A Compiler and Symbolic Debugger for Occam, M.Sc.(Engg.), Aug. 1989.
M.A. Dave, A Parallelizing Compiler for Pascal, M.Sc.(Engg.), Oct.1989.
Laeeq M. Khan, An Implementation of Cross Architecture Procedure Call, M.Sc.(Engg.), June 1990.
K.A. Jasmeer, A Graphical Simulation Environment for Robotics Applications, M.Sc.(Engg.), Aug 1990 (jointly with Prof. M.R. Chidambara)
Y.V. Prasad, PEG-A Programming Environment Generator, M.Sc.(Engg.). Sept. 1990.
R. Venugopal, Instruction Scheduling for RISC Processors, M.Sc.(Engg.), June 1992.
U. Nagaraj Shenoy, An Automatic Parallelization Framework for Multicomputers, M.Sc.(Engg.) Feb. 1993.
Abhay S. Kanhere, Implementation of Data Distribution and Parallelism in HPF, M.Sc(Engg.), June 1997.
B.G. Suresh, RLtools: A Toolset for Visual Language Application Development Based on Relational Grammars , M.Sc(Engg.),July 1997.
Suresh, Object-Oriented Software Engineering of a Compiler Prototyping System, M.Sc(Engg.), July 1997.
R.Lakshminarayan, TriSL: A Software Architecture Description Language and Environment, M.Sc(Engg.), July 1999.
S. Janaki, A Parallelizing Compiler for Fortran, M.Sc(Engg), July 1999.
D.V. Ravindra, Architecture Descriptions for Retargetable Code Generation, M.Sc(Engg.), October 1999.
M.Bharat Kumar, Language Support for Exploiting Software Structure Specifications, M.Sc(Engg.), March 2001.
Abhijit Mandal, Design and Implementation of a Java Virtual Machine, M.Sc(Engg.), July 2000.
Sandeep Kohli, Slicing C++ Programs, M.Sc(Engg.), March 2001.
Ananda Vardhan, Language support for testing CORBA based programs, M.Sc(Engg.), November 2001.
V.Suresh, A framework for e-commerce in small communities, M.Sc(Engg.), November 2001.
Kapil Vaswani, An adaptive Recompilation Framework for Rotor and Architectural Support for Online Program Instrumentation, (M.Sc(Engg.), July 2003.
H.S. Gopalakrishna, Software Architectures for Radar Applications, M.Sc(Engg.) , February 2004.
Devaraj Das, Design and Implementation of an Authentication and Authorization Framework for a Nomadic Service Delivery System, M.Sc(Engg.), March 2003 (jointly with Geetha Manjunath, HP-ISO).
Rahul Nagpal, Integrated Scheduling for Clustered VLIW Processors, (M.Sc(Engg.), December 2003.
Archana Ravindar, Cluster and Collect: Compile Time Optimization for Effective Garbage Collection, M.Sc(Engg.), October 2005.
S.S. Shekhar, Object Cache: An Energy Efficient Cache Architecture, M.Sc(Engg.), July 2006.
Prachee Jindal, Compiler Assisted Energy Management for Sensor Network Nodes, M.Sc(Engg.), January 2009.
Parita Shamjibhai Patel, An OpenCL Compiler for FALCON: A Graph Manipulation Language, M.Sc(Engg.) (ongoing).
Nitesh Chandra Upadhyay, A Giraph Compiler for FALCON: A Graph Manipulation Language, M.Sc(Engg.) (ongoing).
Y.N.~Srikant and Priti Shankar (ed.), The Compiler Design Handbook:~Optimization
and Machine Code Generation, Taylor and Francis (CRC Press), second edition, 2008
(first edition, 2002).
Scalar Compiler Optimizations on the SSA form and the Flowgraph, in :The Compiler Design Handbook: Optimization and Machine Code Generation, CRC Press, 2002.
Energy-aware Compiler Optimizations (jointly with Ananda Vardhan), in : The Compiler Design Handbook: Optimization and Machine Code Generation , CRC Press, 2008.
The Static Single Assignment Form: Construction and Application to Program Optimization (jointly with Priti Shankar and J Prakash Prabhu), in: The Compiler Design Handbook: Optimization and Machine Code Generation, CRC Press, 2008.
Statistical and Machine Learning Techniques for Compiler Design (jointly with Kapil Vaswani, P J Joseph, and Matthew Jacob), in: The Compiler Design Handbook: Optimization and Machine Code Generation, CRC Press, 2008.
Important Journal Publications
Y.N. Srikant, D. Vidyasagar, and L.M. Patnaik, 'An interactive graphics package for 2-D drawing and design', Computers and Graphics, Vol.6, No.1, pp. 23-27,1982.
M.P. Subodh Kumar and Y.N. Srikant, 'Graphical simulation of Petri nets', Computers and Graphics, Vol. 10, No. 3, pp.225-228,1986.
Vijay Gehlot and Y.N. Srikant, 'An interpreter for SLIPS – an applicative language based on lambda-calculus', Computer Languages, Vol.11, No.1, pp. 1-13,1986.
Y.N. Srikant and Priti Shankar, 'A new parallel algorithm for parsing arithmetic infix expressions', Parallel Computing, 4(1987), 291-304.
Y.N. Srikant and Priti Shankar, 'Parallel parsing of programming languages', Information Sciences, vol.43, pp. 55-83, 1987.
H.K. Haripriyan, Y.N. Srikant, and Priti Shankar, 'A compiler writing system based on affix grammars', Computer Languages, Vol. 13, No.1, 1988,pp. 1-11.
A Class of problems efficiently solvable on mesh-connected computers including dynamic expression evoluation, Inf.Proc. Letters, Vol.32, pp.305-311 ,1989. (with A.M. Gibbons)
Incremental Attribute Evaluation through recursive procedures, Computer Languages, Vol.14, No.4, pp 225-237, 1989. (with A.M. Murching)
Two dimensional object recognition using simulated Annealing, Jl. of Ind. Inst. of Science, May-June 1990, Vol.70, pp. 197-212. (with N.K. Sancheti and Y.V. Venkatesh)
Incremental Recursive Descent Parsing, Computer Languages, Vol.15, No.4, pp.193-204, 1990. (with A.M. Murching and Y.V. Prasad)
A Parallel algorithm for the minimization of finite state automata, Intl. Jl. of Computer Mathematics, Vol.132, pp.1-11, 1990.
Parallel Parsing of Arithmetic Expressions, IEEE Trans.Computers, Vol.39, No.1, pp.130-132, 1990.
A Parallelizing Compiler for Pascal, Jl. of Ind.Inst. Of Science, Vol.71, pp.125-157, 1991. (with M.A. Dave)
Linda Subsystem on Transputers, Computer Languages, Vol.18, No.2, pp.125-136, 1993. (with K.H. Shekhar)
Heuristic Chaining in Directed Acyclic Graphs,Computer Languages, Vol. 19, No.3, pp.169-184, 1993. (with R.Venugopal).
Parallel Incremental LR Parsing Computer languages, Vol.20,No.3, pp.151-175, 1994. (with N.Vishwanathan)
Scheduling expression trees with register variables on delayed load architectures, Microprocessors & Microprogramming, Vol.40, pp.572-596, 1994.(with R. Venugopal).
An automatic parallelization framework for multicomputers, Computer Languages, Vol.20, No.3, pp.135-150, 1994.(with Nagaraj Shenoy and V.P. Bhatkar)
Scheduling Expression Trees with Reusable Registers on Delayed-Load Architectures, Computer Languages, Vol.21, No.1, pp 49-65, 1995 (with R. Venugopal).
An Incremental Basic Block Scheduler, Jl of Systems and Architecture, 1998 (with R.Venugopal).
The Complexity of Certain Incremental Code Generation Problems, Int. Journal of Computer Mathematics, 1999(with R. Venugopal).
Automatic Data Partitioning by Hierarchical Genetic Search, Journal of Parallel Algorithms and Architecture, 1999 (with Nagaraj Shenoy, V.P. Bhatkar, and Sandeep Kohli)
A Simple Algorithm for Partial Redundancy Elimination, SIGPLAN Notices, December 1998(with Vineeth Kumar and Priti Shankar)
A Study of Automatic Migration of Programs across Java Event Models, ACM SIGSOFT Notes, Vol.25, No.3, May 2000, pp 24-29 (with M. Bharath Kumar and R. Lakshminarayanan).
Effective Parameterization of Architectural Registers for Register Allocation Algorithms, SIGPLAN Notices, June 2000 (with D.V. Ravindra).
Partial Redundancy Elimination: A Simple, Pragmatic, and Provably Correct Algorithm, Science of Computer Programming, 48 (2003), pp 1-20 (with Vineeth Kumar and Priti Shankar).
Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines, The Journal of the Computer Society of India, Vol.31, No.1, March 2001 (with S.R. Prakash).
Scheduling Expression Trees for Delayed Load Architectures, Journal of Systems Architecture, 48 (2002) pp 151-173 (with R. Venugopal).
On The Use of Connector Libraries in Distributed Software Architectures, ACM SIGSOFT Notes, Vol.27, No.1, 2002 (with M. Bharath Kumar and R. Lakshminarayanan).
Dynamic Recompilation and Profile-guided Optimizations for a .NET JIT Compiler, IEE Proc. Software, 150(5), October 2003, pp 296-302 , (Special issue on Rotor, jointly with Kapil Vaswani).
Pragmatic Integrated Scheduling for Clustered VLIW Architectures, Software: Practice and Experience, Vol.38, No.3, pp. 227-257, March 2008 (jointly with Rahul Nagpal).
Compiler-assisted power optimization for clustered VLIW architectures. Parallel Computing 37(1), pp. 42-59, 2011 (jointly with Rahul Nagpal).
Compiler-Assisted Energy optimization for Clustered VLIW Processors, Journal of Parallel and Distributed Computing, Academic Press, 72(8): 944-959, 2012 ( jointly with Rahul Nagpal).
Aparna Mandke, Bharadwaj Amrutur, and Y. N. Srikant, Towards a Scalable Working Set Size Estimation and its Application for Chip Multiprocessors, IEEE Transactions on Computers, 63(6):1567-1579 (2014).
Unnikrishnan C, Rupesh Nasre, and Y. N. Srikant, Falcon: A Graph Manipulation Language for Heterogeneous Systems, ACM Transactions on Architecture and Code Optimization, 12(4):54, 2016.
Kartik Nagar, and Y. N. Srikant, Fast and Precise Worst Case Interference Placement for Shared Cache Analysis, ACM Transactions on Embedded Computing Systems, 15(3):45, 2016.
Kartik Nagar, and Y. N. Srikant, Refining Cache Behavior Prediction using Cache Miss Paths, ACM Transactions on Embedded Computing Systems (accepted, 2017).
Important Conference Publications from 2003 onwards
J.Prakash, C. Sandeep, Priti Shankar, and Y.N. Srikant, A Simple and Fast Scheme for Code Compression for VLIW Processors, Data Compression Conference, March 2003.
Rahul Nagpal and Y.N. Srikant, Integrated Temporal and Spacial Scheduling for Extended Operand Clustered VLIW Processors, ACM Conf. Computing Frontiers, 2004, pp 457-470.
Rahul Nagpal and Y.N. Srikant, A Graph Matching Based Integrated Scheduling Framework for Clustered VLIW Processors, Workshop on Compile and Run Time Techniques for Parallel Processing, Int. Conf. Parallel Processing, pp. 530-537, 2004.
K. Ananda Vardhan and Y.N. Srikant, Transition-Aware Scheduling: Increasing Continuous Periods in Resource Units, ACM Conf. Computing Frontiers, pp. 189-198, 2005.
Kapil Vaswani, Matthew T Jacob, and Y.N. Srikant, A Programmable Hardware Path Profiler, ACM Conf. Code Generation and Optimization (CGO), pp. 217-228, 2005.
Archana Ravindar and Y.N. Srikant, Static Analysis for Identifying and Allocating Clusters of Immortal Objects, Int. Conf. .NET Technologies, 2005, pp 13-22.
Rahul Nagpal and Y.N. Srikant, Compiler Assisted Leakage Energy Optimization for Clustered VLIW Architectures, ACM EMSOFT, pp. 233-241, October 2006.
Rahul Nagpal and Y.N. Srikant, Exploring Energy-Performance Tradeoffs for Heterogeneous Interconnect Clustered VLIW Processors, HiPC 2006, LNCS 4297, pp. 497-508.
Subhajit Roy and Y.N. Srikant, Slice Switching: A Technique for Software Watermarking, Workshop on New Horizons in Compilers, HiPC 2006.
Kapil Vaswani, P.J. Joseph, Matthew Jacob T., and Y.N. Srikant, Microarchitecture Sensitive Empirical Models for Compiler Optimizations, ACM Conference on Code Generation and Optimization, pp. 131-143, March 2007.
Rathijit Sen and Y.N. Srikant, Executable Analysis using Abstract Interpretation with Circular Linear Progressions, ACM MEMOCODE, pp. 39-48, May-June 2007.
Rathijit Sen and Y.N. Srikant, WCET Estimation for Executables in the Presence of Data Caches, ACM EMSOFT, pp. 203-212, October 2007.
Rahul Nagpal, Arvind Madan, Amrutur Bharadwaj, and Y.N. Srikant, INTACTE: An Interconnect Area, Delay, and Energy Estimation Tool for Microarchitectural Explorations, ACM CASES, pp. 238-247, October 2007.
Rahul Nagpal and Y.N. Srikant, Compiler-Assisted Instruction Decoder Energy Optimization for Clustered VLIW Architectures, HiPC, pp. 405-417, December 2007.
Rahul Nagpal and Y.N. Srikant, Register File Energy Optimization for Snooping Based Clustered VLIW Architectures, SBAC-PAD, pp. 161-168, October 2007.
Subhajit Roy and Y.N. Srikant, Partial Flow Sensitivity, HiPC, pp. 245-256, December 2007.
R. Arun, Rahul Nagpal, and Y.N. Srikant, Compiler-Directed Frequency and Voltage Scaling for a Multiple Clock Domain Microarchitecture, ACM Conference on Computing Frontiers, 2008, pp 209-218.
Subhajit Roy and Y.N. Srikant, Improving Flow-Insensitive Solutions for Non-Separable Dataflow Problems, ACM Symposium on Applied Computing, pp. 211-216, 2008.
Sujit Kumar Chakrabarti, Y.N. Srikant, Test sequence computation for regression testing of reactive systems, ISEC 2008, pp. 131-132.
Subhajit Roy and Y.N. Srikant, Profiling k-Iteration Paths : A Generalization of the Ball-Larus Profiling Algorithm, ACM Conference on Code Generation and Optimization (CGO), March 2009, pp 70-80.
Vinayak Puranik, Tulika Mitra, and Y.N. Srikant, Probabilistic Modeling of Data Cache Behavior, ACM EMSOFT, October 2009, pp 255-264.
Subhajit Roy and Y.N. Srikant, The Hot-Path SSA Form: Extending the Static Single Assignment Form for Speculative Optimizations, Int. Conference on Compiler Construction (CC 2010), March 2010, pp. 304-323.
Aparna Mandke, Keshavan Varadarajan, Amrutur Bhardwaj, and, Y. N.~Srikant, Accelerating Multi-core Simulators, Symposium on Applied Computing, March 2010, pp. 2377-2382.
Jimmy Bahuleyan, Rahul Nagpal, and Y. N. Srikant, Integrated Energy-Aware Cyclic and Acyclic Scheduling for Clustered VLIW Processors, IPDPS Workshop on High-Performance, Power-Aware Computing (HPPAC 2010), April 2010, pp 1-8.
Aparna Mandke, Amrutur Bharadwaj, and Y.N. Srikant, Applying Genetic Algorithms to Optimize the Power in Tiled SNUCA Chip Multicore Architectures, Symposium on Applied Computing, March 2011, pp. 1090-1091.
Archana Ravindar and Y.N. Srikant, Relative roles of IC and CPI in WCET Estimation, International Conference on Performance Engineering, March 2011, pp. 55-60.
R. Arun and Y.N. Srikant, Petri net based Performance Modeling for Effective DVFS for Multi-threaded Programs, Symposium on Applied Computing, March 2011, pp. 647-648.
Arun Ramamurthi, Subhajit Roy, Y. N. Srikant, Probabilistic dataflow analysis using path profiles on structure graphs, SIGSOFT FSE, 2011, pp. 512-515.
Arun Rangasamy, Y. N. Srikant, Evaluation of dynamic voltage and frequency scaling for stream programs, ACM Conf. Computing Frontiers, 2011, Article no. 40.
Archana Ravindar and Y. N. Srikant, Implications of Program Phase Behavior on Timing Analysis, INTERACT 15, 2011, pp. 71-79.
Aparna Mandke, Bharadwaj Amrutur, Y. N. Srikant, and Chiranjeev Bhattacharya, TCP: Thread Contention Predictor for Parallel Programs, Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2012.
Kartik Nagar and Y.N. Srikant, Interdependent Cache Analyses for better precision and safety, ACM MEMOCODE 2012.
Archana Ravindar and Y.N. Srikant, Estimation of Probabilistic Bounds on Phase CPI and Relevance in WCET Analysis, ACM EMSOFT 2012.
Kartik Nagar and Y.N. Srikant, Precise shared cache analysis using optimal interference placement, RTAS, pp 125-134, 2014.
Anand Vardhan K., and Y.N. Srikant, Exploiting Critical Data Regions to Reduce Data Cache Energy Consumption, SCOPES, pp 69-78, 2014.
Kartik Nagar and Y.N. Srikant, Path sensitive cache analysis using cache miss paths, VMCAI, pp 43-60, 2015.
Rajesh Kumar Thakur, and Y.N. Srikant, Efficient Compilation of Stream Programs for Heterogeneous Architectures: A Model-Checking based Approach, SCOPES, pp 38-47, 2015.
Ashish Mishra, Aditya Kanade, and Y. N. Srikant, Asynchrony-aware static analysis of Android applications, MEMOCODE, pp 163-172, 2016.