Timed control synthesis for external specifications

Timed control synthesis for external specifications

Deepak D'Souza & P. Madhusudan

Proc. STACS 2002, LNCS 2285 (2002)


Abstract

We study the problem of control synthesis for a timed plant and an external timed specification, modelled as timed automata. Our main result is that the problem is decidable when we are given a priori the resources for the controller (the number of clocks, observational power of clocks, etc.) and when the specification is an w-regular timed language describing undesired behaviours. We also show that for deterministic specifications, if there is a controller at all, then there is one which uses the combined resources of the plant and specification. The decidability of other related problems is also investigated.


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